mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX 2707 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX                                                          0
mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX  807 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX                                                          0
mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX  781 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX                                                          0
mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX  757 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX                                                          0