mmSPI_DSM_CNTL2_BASE_IDX 2591 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_DSM_CNTL2_BASE_IDX                                                                       0
mmSPI_DSM_CNTL2_BASE_IDX  687 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_DSM_CNTL2_BASE_IDX                                                                       0
mmSPI_DSM_CNTL2_BASE_IDX  669 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_DSM_CNTL2_BASE_IDX                                                                       0
mmSPI_DSM_CNTL2_BASE_IDX  647 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_DSM_CNTL2_BASE_IDX                                                                       0