mmSPI_CONFIG_CNTL_BASE_IDX 2587 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSPI_CONFIG_CNTL_BASE_IDX                                                                     0
mmSPI_CONFIG_CNTL_BASE_IDX 5111 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSPI_CONFIG_CNTL_BASE_IDX                                                                     1
mmSPI_CONFIG_CNTL_BASE_IDX 5363 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSPI_CONFIG_CNTL_BASE_IDX                                                                     1
mmSPI_CONFIG_CNTL_BASE_IDX 5321 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSPI_CONFIG_CNTL_BASE_IDX                                                                     1