mmSOCCLK_CGTT_BLK_CTRL_REG  552 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmSOCCLK_CGTT_BLK_CTRL_REG                                                                     0x0076
mmSOCCLK_CGTT_BLK_CTRL_REG  196 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmSOCCLK_CGTT_BLK_CTRL_REG                                                                     0x0076
mmSOCCLK_CGTT_BLK_CTRL_REG  210 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmSOCCLK_CGTT_BLK_CTRL_REG                                                                     0x0076