mmSMBUS_UDID_CNTL1_BASE_IDX  233 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_offset.h #define mmSMBUS_UDID_CNTL1_BASE_IDX                                                                    0
mmSMBUS_UDID_CNTL1_BASE_IDX  315 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_offset.h #define mmSMBUS_UDID_CNTL1_BASE_IDX                                                                    0