mmSMBUS_TIMING_CNTL1_BASE_IDX  225 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_offset.h #define mmSMBUS_TIMING_CNTL1_BASE_IDX                                                                  0
mmSMBUS_TIMING_CNTL1_BASE_IDX  307 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_offset.h #define mmSMBUS_TIMING_CNTL1_BASE_IDX                                                                  0