mmSMBUS_TIMING_CNTL0_BASE_IDX  223 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_offset.h #define mmSMBUS_TIMING_CNTL0_BASE_IDX                                                                  0
mmSMBUS_TIMING_CNTL0_BASE_IDX  305 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_offset.h #define mmSMBUS_TIMING_CNTL0_BASE_IDX                                                                  0