mmSLAVE_COMM_CNTL_REG_BASE_IDX 1301 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmSLAVE_COMM_CNTL_REG_BASE_IDX                                                                 2
mmSLAVE_COMM_CNTL_REG_BASE_IDX 1021 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmSLAVE_COMM_CNTL_REG_BASE_IDX                                                                 2
mmSLAVE_COMM_CNTL_REG_BASE_IDX  689 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmSLAVE_COMM_CNTL_REG_BASE_IDX                                                                 2
mmSLAVE_COMM_CNTL_REG_BASE_IDX  651 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmSLAVE_COMM_CNTL_REG_BASE_IDX                                                                 2