mmSH_MEM_CONFIG_BASE_IDX 2449 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSH_MEM_CONFIG_BASE_IDX                                                                       0
mmSH_MEM_CONFIG_BASE_IDX  409 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSH_MEM_CONFIG_BASE_IDX                                                                       0
mmSH_MEM_CONFIG_BASE_IDX  403 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSH_MEM_CONFIG_BASE_IDX                                                                       0
mmSH_MEM_CONFIG_BASE_IDX  399 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSH_MEM_CONFIG_BASE_IDX                                                                       0