mmSH_MEM_BASES_BASE_IDX 2443 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSH_MEM_BASES_BASE_IDX                                                                        0
mmSH_MEM_BASES_BASE_IDX  407 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmSH_MEM_BASES_BASE_IDX                                                                        0
mmSH_MEM_BASES_BASE_IDX  401 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmSH_MEM_BASES_BASE_IDX                                                                        0
mmSH_MEM_BASES_BASE_IDX  397 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmSH_MEM_BASES_BASE_IDX                                                                        0