mmSEM_UTCL2_TRAN_EN_LUT_BASE_IDX  243 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_offset.h #define mmSEM_UTCL2_TRAN_EN_LUT_BASE_IDX                                                               0
mmSEM_UTCL2_TRAN_EN_LUT_BASE_IDX  243 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_offset.h #define mmSEM_UTCL2_TRAN_EN_LUT_BASE_IDX                                                               0
mmSEM_UTCL2_TRAN_EN_LUT_BASE_IDX  255 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_offset.h #define mmSEM_UTCL2_TRAN_EN_LUT_BASE_IDX                                                               0