mmSEM_RESP_VCE_1_BASE_IDX  317 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_offset.h #define mmSEM_RESP_VCE_1_BASE_IDX                                                                      0
mmSEM_RESP_VCE_1_BASE_IDX  307 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_offset.h #define mmSEM_RESP_VCE_1_BASE_IDX                                                                      0
mmSEM_RESP_VCE_1_BASE_IDX  333 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_offset.h #define mmSEM_RESP_VCE_1_BASE_IDX                                                                      0