mmSEM_RESP_UVD_BASE_IDX  309 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_offset.h #define mmSEM_RESP_UVD_BASE_IDX                                                                        0
mmSEM_RESP_UVD_BASE_IDX  299 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_offset.h #define mmSEM_RESP_UVD_BASE_IDX                                                                        0
mmSEM_RESP_UVD_BASE_IDX  325 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_offset.h #define mmSEM_RESP_UVD_BASE_IDX                                                                        0