mmSEM_RESP_GC_BASE_IDX  321 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_offset.h #define mmSEM_RESP_GC_BASE_IDX                                                                         0
mmSEM_RESP_GC_BASE_IDX  311 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_offset.h #define mmSEM_RESP_GC_BASE_IDX                                                                         0
mmSEM_RESP_GC_BASE_IDX  337 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_offset.h #define mmSEM_RESP_GC_BASE_IDX                                                                         0