mmSEM_REGISTER_LAST_PART1_BASE_IDX  335 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_offset.h #define mmSEM_REGISTER_LAST_PART1_BASE_IDX                                                             0
mmSEM_REGISTER_LAST_PART1_BASE_IDX  325 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_offset.h #define mmSEM_REGISTER_LAST_PART1_BASE_IDX                                                             0
mmSEM_REGISTER_LAST_PART1_BASE_IDX  351 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_offset.h #define mmSEM_REGISTER_LAST_PART1_BASE_IDX                                                             0