BIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CAP__CAPTURED_SLOT_POWER_LIMIT_MASK 103087 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CAP__CAPTURED_SLOT_POWER_LIMIT_MASK                                    0x03FC0000L
BIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CAP__CAPTURED_SLOT_POWER_LIMIT_MASK 30787 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF6_1_DEVICE_CAP__CAPTURED_SLOT_POWER_LIMIT_MASK                                    0x03FC0000L