mmSDMA1_UTCL1_CNTL 1105 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_UTCL1_CNTL                                                                             0x063c
mmSDMA1_UTCL1_CNTL  126 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_UTCL1_CNTL	0x003c
mmSDMA1_UTCL1_CNTL  126 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_UTCL1_CNTL                                                                             0x003c
mmSDMA1_UTCL1_CNTL  126 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_UTCL1_CNTL                                                                             0x003c