mmSDMA1_RLC7_RB_WPTR_HI_BASE_IDX 1960 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC7_RB_WPTR_HI_BASE_IDX                                                               0
mmSDMA1_RLC7_RB_WPTR_HI_BASE_IDX  971 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC7_RB_WPTR_HI_BASE_IDX                                                               0
mmSDMA1_RLC7_RB_WPTR_HI_BASE_IDX  967 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC7_RB_WPTR_HI_BASE_IDX                                                               0