mmSDMA1_RLC7_RB_CNTL_BASE_IDX 1948 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC7_RB_CNTL_BASE_IDX                                                                  0
mmSDMA1_RLC7_RB_CNTL_BASE_IDX  959 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC7_RB_CNTL_BASE_IDX                                                                  0
mmSDMA1_RLC7_RB_CNTL_BASE_IDX  955 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC7_RB_CNTL_BASE_IDX                                                                  0