mmSDMA1_RLC6_RB_WPTR_POLL_CNTL 1878 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC6_RB_WPTR_POLL_CNTL                                                                 0x0987
mmSDMA1_RLC6_RB_WPTR_POLL_CNTL  888 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC6_RB_WPTR_POLL_CNTL                                                                 0x0347
mmSDMA1_RLC6_RB_WPTR_POLL_CNTL  884 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC6_RB_WPTR_POLL_CNTL                                                                 0x0387