mmSDMA1_RLC5_RB_WPTR_POLL_CNTL 1795 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL                                                                 0x0927
mmSDMA1_RLC5_RB_WPTR_POLL_CNTL  804 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL                                                                 0x02ef
mmSDMA1_RLC5_RB_WPTR_POLL_CNTL  800 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL                                                                 0x0327