mmSDMA1_RLC5_RB_WPTR_HI 1793 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC5_RB_WPTR_HI                                                                        0x0926
mmSDMA1_RLC5_RB_WPTR_HI  802 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC5_RB_WPTR_HI                                                                        0x02ee
mmSDMA1_RLC5_RB_WPTR_HI  798 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC5_RB_WPTR_HI                                                                        0x0326