mmSDMA1_RLC5_RB_WPTR 1791 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC5_RB_WPTR                                                                           0x0925
mmSDMA1_RLC5_RB_WPTR  800 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC5_RB_WPTR                                                                           0x02ed
mmSDMA1_RLC5_RB_WPTR  796 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC5_RB_WPTR                                                                           0x0325