mmSDMA1_RLC5_IB_BASE_LO_BASE_IDX 1808 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC5_IB_BASE_LO_BASE_IDX                                                               0
mmSDMA1_RLC5_IB_BASE_LO_BASE_IDX  817 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC5_IB_BASE_LO_BASE_IDX                                                               0
mmSDMA1_RLC5_IB_BASE_LO_BASE_IDX  813 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC5_IB_BASE_LO_BASE_IDX                                                               0