mmSDMA1_RLC4_RB_WPTR_POLL_CNTL 1712 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL                                                                 0x08c7
mmSDMA1_RLC4_RB_WPTR_POLL_CNTL  720 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL                                                                 0x0297
mmSDMA1_RLC4_RB_WPTR_POLL_CNTL  716 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL                                                                 0x02c7