mmSDMA1_RLC3_RB_RPTR_ADDR_LO_BASE_IDX 1634 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC3_RB_RPTR_ADDR_LO_BASE_IDX                                                          0
mmSDMA1_RLC3_RB_RPTR_ADDR_LO_BASE_IDX  641 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC3_RB_RPTR_ADDR_LO_BASE_IDX                                                          0
mmSDMA1_RLC3_RB_RPTR_ADDR_LO_BASE_IDX  637 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC3_RB_RPTR_ADDR_LO_BASE_IDX                                                          0