mmSDMA1_RLC2_RB_WPTR_POLL_CNTL 1546 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC2_RB_WPTR_POLL_CNTL                                                                 0x0807
mmSDMA1_RLC2_RB_WPTR_POLL_CNTL  552 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC2_RB_WPTR_POLL_CNTL                                                                 0x01e7
mmSDMA1_RLC2_RB_WPTR_POLL_CNTL  548 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC2_RB_WPTR_POLL_CNTL                                                                 0x0207