mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI 1587 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI                                                              0x0832
mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI  594 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI                                                              0x0212
mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI  590 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI                                                              0x0232