mmSDMA1_RLC2_RB_RPTR_HI_BASE_IDX 1541 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC2_RB_RPTR_HI_BASE_IDX                                                               0
mmSDMA1_RLC2_RB_RPTR_HI_BASE_IDX  547 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC2_RB_RPTR_HI_BASE_IDX                                                               0
mmSDMA1_RLC2_RB_RPTR_HI_BASE_IDX  543 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC2_RB_RPTR_HI_BASE_IDX                                                               0