mmSDMA1_RLC2_MIDCMD_DATA0_BASE_IDX 1596 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC2_MIDCMD_DATA0_BASE_IDX                                                             0
mmSDMA1_RLC2_MIDCMD_DATA0_BASE_IDX  603 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC2_MIDCMD_DATA0_BASE_IDX                                                             0
mmSDMA1_RLC2_MIDCMD_DATA0_BASE_IDX  599 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC2_MIDCMD_DATA0_BASE_IDX                                                             0