mmSDMA1_RLC1_WATERMARK 1490 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC1_WATERMARK                                                                         0x07ca
mmSDMA1_RLC1_WATERMARK  404 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA1_RLC1_WATERMARK                                                  0x37aa
mmSDMA1_RLC1_WATERMARK  373 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA1_RLC1_WATERMARK                                                  0x37aa
mmSDMA1_RLC1_WATERMARK  484 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA1_RLC1_WATERMARK                                                  0x37aa
mmSDMA1_RLC1_WATERMARK  582 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA1_RLC1_WATERMARK                                                  0x37aa
mmSDMA1_RLC1_WATERMARK  496 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_RLC1_WATERMARK	0x01ca
mmSDMA1_RLC1_WATERMARK  496 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC1_WATERMARK                                                                         0x01b2
mmSDMA1_RLC1_WATERMARK  492 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC1_WATERMARK                                                                         0x01ca