mmSDMA1_RLC1_RB_WPTR_HI 1461 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC1_RB_WPTR_HI                                                                        0x07a6
mmSDMA1_RLC1_RB_WPTR_HI  466 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_RLC1_RB_WPTR_HI	0x01a6
mmSDMA1_RLC1_RB_WPTR_HI  466 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC1_RB_WPTR_HI                                                                        0x018e
mmSDMA1_RLC1_RB_WPTR_HI  462 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC1_RB_WPTR_HI                                                                        0x01a6