mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX 1395 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX                                                               0
mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX  399 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX	0
mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX  399 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX                                                               0
mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX  395 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RLC0_IB_BASE_HI_BASE_IDX                                                               0