mmSDMA1_RD_BURST_CNTL_BASE_IDX 1072 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_RD_BURST_CNTL_BASE_IDX                                                                 0
mmSDMA1_RD_BURST_CNTL_BASE_IDX   93 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_RD_BURST_CNTL_BASE_IDX	0
mmSDMA1_RD_BURST_CNTL_BASE_IDX   93 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_RD_BURST_CNTL_BASE_IDX                                                                 0
mmSDMA1_RD_BURST_CNTL_BASE_IDX   93 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_RD_BURST_CNTL_BASE_IDX                                                                 0