mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 1297 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 0x06e7 mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 300 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 0x00e7 mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 300 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 0x00df mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 296 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL 0x00e7