mmSDMA1_PAGE_RB_WPTR_HI 1295 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_PAGE_RB_WPTR_HI                                                                        0x06e6
mmSDMA1_PAGE_RB_WPTR_HI  298 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_PAGE_RB_WPTR_HI	0x00e6
mmSDMA1_PAGE_RB_WPTR_HI  298 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_PAGE_RB_WPTR_HI                                                                        0x00de
mmSDMA1_PAGE_RB_WPTR_HI  294 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_PAGE_RB_WPTR_HI                                                                        0x00e6