mmSDMA1_PAGE_RB_WPTR 1293 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_PAGE_RB_WPTR                                                                           0x06e5
mmSDMA1_PAGE_RB_WPTR  296 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_PAGE_RB_WPTR	0x00e5
mmSDMA1_PAGE_RB_WPTR  296 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_PAGE_RB_WPTR                                                                           0x00dd
mmSDMA1_PAGE_RB_WPTR  292 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_PAGE_RB_WPTR                                                                           0x00e5