mmSDMA1_GFX_RB_WPTR 1208 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_GFX_RB_WPTR                                                                            0x0685
mmSDMA1_GFX_RB_WPTR  341 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA1_GFX_RB_WPTR                                                     0x3684
mmSDMA1_GFX_RB_WPTR  300 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA1_GFX_RB_WPTR                                                     0x3684
mmSDMA1_GFX_RB_WPTR  389 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA1_GFX_RB_WPTR                                                     0x3684
mmSDMA1_GFX_RB_WPTR  493 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA1_GFX_RB_WPTR                                                     0x3684
mmSDMA1_GFX_RB_WPTR  210 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_GFX_RB_WPTR	0x0085
mmSDMA1_GFX_RB_WPTR  210 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_GFX_RB_WPTR                                                                            0x0085
mmSDMA1_GFX_RB_WPTR  206 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_GFX_RB_WPTR                                                                            0x0085