mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX 1262 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX                                                          0
mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX  265 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h #define mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX	0
mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX  265 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_offset.h #define mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX                                                          0
mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX  261 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_offset.h #define mmSDMA1_GFX_MINOR_PTR_UPDATE_BASE_IDX                                                          0