mmSDMA0_VF_ENABLE_BASE_IDX 10487 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_VF_ENABLE_BASE_IDX                                                                     1
mmSDMA0_VF_ENABLE_BASE_IDX   45 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_VF_ENABLE_BASE_IDX	0
mmSDMA0_VF_ENABLE_BASE_IDX   45 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_VF_ENABLE_BASE_IDX                                                                     0
mmSDMA0_VF_ENABLE_BASE_IDX   45 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_VF_ENABLE_BASE_IDX                                                                     0