mmSDMA0_UTCL1_WATERMK  108 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_UTCL1_WATERMK                                                                          0x003d
mmSDMA0_UTCL1_WATERMK  136 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_UTCL1_WATERMK	0x003d
mmSDMA0_UTCL1_WATERMK  134 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_UTCL1_WATERMK                                                                          0x003d
mmSDMA0_UTCL1_WATERMK  136 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_UTCL1_WATERMK                                                                          0x003d
mmSDMA0_UTCL1_WATERMK  136 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_UTCL1_WATERMK                                                                          0x003d