mmSDMA0_UTCL1_PAGE  130 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_UTCL1_PAGE                                                                             0x0048
mmSDMA0_UTCL1_PAGE  158 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_UTCL1_PAGE	0x0048
mmSDMA0_UTCL1_PAGE  156 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_UTCL1_PAGE                                                                             0x0048
mmSDMA0_UTCL1_PAGE  158 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_UTCL1_PAGE                                                                             0x0048
mmSDMA0_UTCL1_PAGE  158 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_UTCL1_PAGE                                                                             0x0048