mmSDMA0_UTCL1_INV2  118 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_UTCL1_INV2                                                                             0x0042
mmSDMA0_UTCL1_INV2  146 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_UTCL1_INV2	0x0042
mmSDMA0_UTCL1_INV2  144 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_UTCL1_INV2                                                                             0x0042
mmSDMA0_UTCL1_INV2  146 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_UTCL1_INV2                                                                             0x0042
mmSDMA0_UTCL1_INV2  146 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_UTCL1_INV2                                                                             0x0042