mmSDMA0_UTCL1_INV0  114 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_UTCL1_INV0                                                                             0x0040
mmSDMA0_UTCL1_INV0  142 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_UTCL1_INV0	0x0040
mmSDMA0_UTCL1_INV0  140 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_UTCL1_INV0                                                                             0x0040
mmSDMA0_UTCL1_INV0  142 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_UTCL1_INV0                                                                             0x0040
mmSDMA0_UTCL1_INV0  142 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_UTCL1_INV0                                                                             0x0040