mmSDMA0_UTCL1_CNTL  106 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_UTCL1_CNTL                                                                             0x003c
mmSDMA0_UTCL1_CNTL  134 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_UTCL1_CNTL	0x003c
mmSDMA0_UTCL1_CNTL  132 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_UTCL1_CNTL                                                                             0x003c
mmSDMA0_UTCL1_CNTL  134 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_UTCL1_CNTL                                                                             0x003c
mmSDMA0_UTCL1_CNTL  134 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_UTCL1_CNTL                                                                             0x003c