mmSDMA0_RLC7_RB_WPTR_POLL_CNTL  962 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC7_RB_WPTR_POLL_CNTL                                                                 0x03e7
mmSDMA0_RLC7_RB_WPTR_POLL_CNTL  980 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC7_RB_WPTR_POLL_CNTL                                                                 0x039f
mmSDMA0_RLC7_RB_WPTR_POLL_CNTL  976 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC7_RB_WPTR_POLL_CNTL                                                                 0x03e7