mmSDMA0_RLC7_RB_WPTR_HI  960 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC7_RB_WPTR_HI                                                                        0x03e6
mmSDMA0_RLC7_RB_WPTR_HI  978 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC7_RB_WPTR_HI                                                                        0x039e
mmSDMA0_RLC7_RB_WPTR_HI  974 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC7_RB_WPTR_HI                                                                        0x03e6