mmSDMA0_RLC7_RB_WPTR  958 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC7_RB_WPTR                                                                           0x03e5
mmSDMA0_RLC7_RB_WPTR  976 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC7_RB_WPTR                                                                           0x039d
mmSDMA0_RLC7_RB_WPTR  972 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC7_RB_WPTR                                                                           0x03e5