mmSDMA0_RLC7_RB_CNTL_BASE_IDX  949 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC7_RB_CNTL_BASE_IDX                                                                  0
mmSDMA0_RLC7_RB_CNTL_BASE_IDX  967 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC7_RB_CNTL_BASE_IDX                                                                  0
mmSDMA0_RLC7_RB_CNTL_BASE_IDX  963 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC7_RB_CNTL_BASE_IDX                                                                  0