mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI  920 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI                                                              0x03b2
mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI  938 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI                                                              0x0372
mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI  934 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI                                                              0x03b2